InP DHBT-based clock and data recovery circuits for ultra-high-speed optical data links
Abstract
In this work, up to 80 Gbit/s monolithically integrated clock and data recovery (CDR) circuits with 1:2 demultiplexer are developed. The integrated circuits are manufactured using an InP double heterojunction bipolar transistor (DHBT) technology, featuring cut-off frequency values of more than 250 GHz. The outstanding and (to some extent) record achievements throughout the work make an essential contribution to the development of future optical telecommunication networks operating at 80 Gbit/s.
Keywords
InP DHBT; Phase detector; Phase-locked loop; Optical link; Clock and data recoveryISBN
3866440456Publisher
KIT Scientific PublishingPublisher website
http://www.ksp.kit.edu/Publication date and place
2006Classification
Technology: general issues